Click here to Skip to main content
969 members (186 online)

CPU

Great Reads

by Andrey Karpov
The article briefly describes AMD64 architecture by AMD Company and its implementation EM64T by Intel Company. The architecture's peculiarities, advantages and disadvantages are described.
by knockNrod
Describes one effort to run performance monitor to identify what's wrong with a counter log, then set up an event trace to see who the culprit is.
by Omar Al Zabir
CPUAlert monitors CPU and Memory consumption of processes and alerts you when they are taking too much consistently and gives you an option to recycle or terminate
by _beauw_
Architecture for scalable arrays of PIC processors; each processor is responsible for all aspects of control in a single dimension, using a PID algorithm.

Latest Articles

by _beauw_
Architecture for scalable arrays of PIC processors; each processor is responsible for all aspects of control in a single dimension, using a PID algorithm.
by Andrey Karpov
The article briefly describes AMD64 architecture by AMD Company and its implementation EM64T by Intel Company. The architecture's peculiarities, advantages and disadvantages are described.
by Omar Al Zabir
CPUAlert monitors CPU and Memory consumption of processes and alerts you when they are taking too much consistently and gives you an option to recycle or terminate
by knockNrod
Describes one effort to run performance monitor to identify what's wrong with a counter log, then set up an event trace to see who the culprit is.

All Articles

    Sort by Score

    General 

    9 Apr 2012
    Andrey Karpov
    The article briefly describes AMD64 architecture by AMD Company and its implementation EM64T by Intel Company. The architecture's peculiarities, advantages and disadvantages are described.
    21 Nov 2011
    knockNrod
    Describes one effort to run performance monitor to identify what's wrong with a counter log, then set up an event trace to see who the culprit is.
    25 Nov 2011
    Omar Al Zabir
    CPUAlert monitors CPU and Memory consumption of processes and alerts you when they are taking too much consistently and gives you an option to recycle or terminate
    10 Apr 2012
    _beauw_
    Architecture for scalable arrays of PIC processors; each processor is responsible for all aspects of control in a single dimension, using a PID algorithm.


    Advertise | Privacy |
    RA-Web1 | 2.8.170813.1 | Last Updated 23 Aug 2017
    Copyright © RootAdmin, 1999-2017
    All Rights Reserved. Terms of Service
    Layout: fixed | fluid